HardwareGermany2023
FPGA signal-processing pipeline for solid-state LiDAR
Real-time point-cloud extraction in Verilog on Zynq-7000 — waveform to points at line rate.
- Client
- Blickfeld
- Region
- Germany
- Sector
- Solid-state LiDAR / silicon
- Engagement
- 2023 · 24 weeks
- Team
- 2 FPGA · 1 DSP · 1 verification
- Status
- In production
The challenge
A solid-state LiDAR needed its raw photodetector waveforms turned into a clean point cloud in real time, inside a power and latency budget a CPU/GPU path could not hold. Peak detection, time-of-flight, and calibration all had to run deterministically in fabric.
What we built
The full pipeline, end to end — not a blurb.
- 01FPGA
A peak-detection and time-of-flight pipeline written in Verilog on the Zynq-7000 programmable logic.
- 02HLS
Calibration and intensity-correction blocks synthesized through Vivado HLS.
- 03Firmware
The ARM side handling scan control, configuration, and host streaming.
- 04Verification
A cycle-accurate testbench and hardware-in-the-loop against reference point clouds.
- 05Deployment
A signed bitstream and a field calibration flow.
Results
4.6 µs
waveform-to-point latency, point cloud at line rate
1.2 M/s
points sustained on-device
±1.8 cm
range precision after fabric calibration
38%
lower processing power vs. the prior SoC path
Ships in the production sensor’s processing path.
Have a constraint like Blickfeld’s? Bring us yours.
Next engagement
Konux
Railway IoT + predictive maintenance